A control apparatus of a general ion cyclotron resonance mass spectrometer will be described with reference to FIGS. 1 to 4 as follows:
FIG. 1 is a schematic view of the control apparatus of the general ion cyclotron resonance mass spectrometer, FIG. 2 is a circuit diagram showing signal transmission to an ion trap, FIG. 3 shows a sequence of controlling respective blocks in a control program according to a related art, and FIGS. 4a and 4b are views for explaining a way to use hardware resources through a pipeline control method according to a related art.
As shown in FIG. 1, the general ion cyclotron resonance mass spectrometer includes a sample injection/ionization unit 1 configured to ionize an injected sample and discharge ionized samples, a first ion transmission unit 2 configured to transmit the ions discharged from the sample injection/ionization unit 1, an ion selection (separation) unit 3 configured to select or separate and discharge the ions transmitted through the first ion transmission unit 2 according to a specific purpose, an ion collision unit 4 configured to collide the ions selected or separated by the ion selection (separation) unit 3 with a collision gas to divide the ions into smaller sizes of ions and then discharge the ions, a second ion transmission unit 5 configured to transmit the ions divided by the ion collision unit 4, an ion trap 6 configured to collect the ions transmitted through the second ion transmission unit 5 into the ion trap and then detect an electrical signal representing the mass of the ions satisfying a specific purpose, an arbitrary waveform generating unit (AWG) 8 configured to generate an arbitrary waveform from the signal detected by the ion trap 6 using a control program of a computer 10, and a high frequency amplifier (RF Amp) 7 configured to amplify the generated arbitrary waveform, wherein the amplified waveform is applied to the ion trap 6 to excite the ions. The excited signal passes through a pre-amplifier (Pre Amp) 12 shown in FIG. 2 via another electrode to be amplified to a signal size appropriate for detection, and then, passes through a digitizer (A/D) 13 to become a digital signal, so that signal processing is performed in the computer.
FIG. 3 shows a case in which hardware resources are sequentially used according to a time flow.
FIGS. 4a and 4b show a way to use the hardware resources through a pipeline control method according to a related art.
While pipeline-type parallel control procedures may be configured as shown in FIG. 4A, when various procedures overlap in the same time band in an actual time region as shown in FIG. 4B, the procedure having the longest control time causes a time delay of the other control procedures. The time delay occurred when the control procedures overlap, causes loss of control time and sample processing, reducing precision and efficiency of experiments.